The present invention generally relates to complementary metal-oxide-semiconductor (CMOS) fabrication methods and related structures. More specifically, the present invention relates to fabrication methods and resulting device architectures for uniform shallow trench isolation (STI) fill regions formed around fin structures on a CMOS device.
Semiconductor devices are typically formed using active regions of a wafer. The active regions are defined by isolation regions (e.g., STI) used to separate and electrically isolate adjacent semiconductor devices. In contemporary fin-based CMOS device fabrication processes, the fins can bend if unequal masses of STI fill regions are around the fin structures. It is undesirable for fin structures to bend during fabrication of a fin-based CMOS device.